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Integral to the mathematics of the RC5 algorithm are 32-bit
rotate operations.
For whatever reason, the designers of the IA32 (32bit Intel x86) and the PowerPC architectures decided to implement the rotate function as a hardware instruction. Many other CPUs do not have built-in hardware rotate instructions and must emulate the operation by (at the very least) two shifts and a logical OR. This handicap is why many non-32bit-Intel [1] and non-PowerPC computers run RC5 slower than one might expect based on real-world benchmarks. It is also the main reason why the RC5 client is a poor benchmark to use in determining the speed or performance of a particular CPU.
[1] The IA32 architecture is that used by
the Intel 80386, 80486, Pentium, Pentium Pro, Pentium II, Pentium III and Pentium 4 processors. The Pentium 4 has a slow, multi-cycle hardware rotate
instruction up until the Prescott revision.
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